Kirchhoff's Voltage Law (KVL) and Current Law are used in network analysis when simple parallel/series rules cannot be applied.
KVL is applied to loops in a circuit. A loop is any closed path in a circuit. KVL states that the sum of voltage drops around a loop is equal to the sum of voltage rises around the same loop.
In general:
k=1∑nVk=0Note: no nodes exist in the above network, so the current through each element is the same. This is not always the case, and KCL must be applied to determine currents in more complex circuits (see below).
KCL is applied to nodes in a circuit. A node is any point in a circuit where two or more circuit elements meet. KCL states that the sum of currents entering a node is equal to the sum of currents leaving the node.
In general:
k=1∑nIk=0Consider the following circuit:
The goal is to find the currents I1, I2, I3, I4, and I5.
Firstly, annotate the schematic with the KVL loops and determine KCL nodes:
Then, write KVL and KCL equations for the loops and nodes, respectively:
Loop A:Loop B:Loop C:Node AB:Node BC:−12+4I1+3I2=05+2I3−4I1=0−5+2I4=0I2=I1+I3I4=I3+I5Now, we can solve the system of equations. I4 can be solved for immediately from Loop C:
I4=2.5 AThen, rearranging Node AB allows us to solve Loop A and Loop B for I1 and I2:
I3=Loop A:Loop B:⟹⟹I2−I1−12+4I1+3I2=05+2(I2−I1)−4I1=0I1=1.5 AI2=2 AI3 can then be solved for using Node AB:
I3=I2−I1=0.5 AFinally, I5 can be solved for using Node BC:
I5=I4−I3=2 ASo, the final solution is:
I1=I2=I3=I4=I5=1.5 A2 A0.5 A2.5 A2 A